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'''
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Based on gen_gerber_and_drill_files_board.py in kicad/demos directory.
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'''
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import sys
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from pcbnew import *
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filename=sys.argv[1]
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board = LoadBoard(filename)
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plotDir = "plot/"
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pctl = PLOT_CONTROLLER(board)
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popt = pctl.GetPlotOptions()
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popt.SetOutputDirectory(plotDir)
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# Set some important plot options:
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popt.SetPlotFrameRef(False)
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popt.SetLineWidth(FromMM(0.35))
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popt.SetAutoScale(False)
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popt.SetScale(1)
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popt.SetMirror(False)
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popt.SetUseGerberAttributes(False)
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popt.SetUseGerberProtelExtensions(True)
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popt.SetExcludeEdgeLayer(True);
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popt.SetScale(1)
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popt.SetUseAuxOrigin(True)
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# This by gerbers only (also the name is truly horrid!)
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popt.SetSubtractMaskFromSilk(False)
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# param 0 is the layer ID
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# param 1 is a string added to the file base name to identify the drawing
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# param 2 is a comment
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# Create filenames in a way that if they are sorted alphabetically, they
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# are shown in exactly the layering the board would look like. So
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# gerbv *
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# just makes sense.
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plot_plan = [
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( Edge_Cuts, "0-Edge_Cuts", "Edges" ),
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( F_Paste, "1-PasteTop", "Paste top" ),
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( F_SilkS, "2-SilkTop", "Silk top" ),
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( F_Mask, "3-MaskTop", "Mask top" ),
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( F_Cu, "4-CuTop", "Top layer" ),
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( B_Cu, "5-CuBottom", "Bottom layer" ),
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( B_Mask, "6-MaskBottom", "Mask bottom" ),
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( B_SilkS, "7-SilkBottom", "Silk top" ),
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( B_Paste, "8-PasteBottom", "Paste Bottom" ),
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]
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for layer_info in plot_plan:
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pctl.SetLayer(layer_info[0])
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pctl.OpenPlotfile(layer_info[1], PLOT_FORMAT_GERBER, layer_info[2])
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pctl.PlotLayer()
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# At the end you have to close the last plot, otherwise you don't know when
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# the object will be recycled!
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pctl.ClosePlot()
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# Fabricators need drill files.
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# sometimes a drill map file is asked (for verification purpose)
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drlwriter = EXCELLON_WRITER( board )
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drlwriter.SetMapFileFormat( PLOT_FORMAT_PDF )
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mirror = False
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minimalHeader = False
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offset = wxPoint(0,0)
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mergeNPTH = True
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drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH )
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metricFmt = True
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drlwriter.SetFormat( metricFmt )
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genDrl = True
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genMap = True
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drlwriter.CreateDrillandMapFilesSet( plotDir, genDrl, genMap );
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@@ -0,0 +1,8 @@
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# -*- Makefile -*-
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%-fab.zip : %-fab.kicad_pcb
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python ../kicad-scripts/kicad-fab.py $<
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zip -r $@ plot/
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%-fab.kicad_pcb : %.kicad_pcb
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sed "s/%%gitversion%%/`git log --date=short --pretty=format:'%h@%cd' -n 1`/" < $^ > $@
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